Minimizing Interacting Finite State Machines

Memorandum No. UCB/ERL M93/68, 9 September 1993

29 Pages Posted: 17 Nov 2020

See all articles by Gitanjali Swamy

Gitanjali Swamy

PCRI, Harvard Business School; IoTask; University of California, Berkeley; Auto-ID Center, MIT

Date Written: 1993

Abstract

We address the problem of minimizing collections of interacting finite state machines that arise in the context of formal verification. Typically much of the behavior of the system is redundant with respect to a given property being verified, and so the system can be replaced by substantially simpler representations. These redundancies can be captured by a series of equivalence relations on the state space. Directly minimizing the system requires forming the complete product machine which can be very large. We describe hierarchical procedures that minimize the system with respect to explicit and implicit representations. We present experimental results on some standard verification examples to show that our algorithms allow the product machine to be represented by very small implicit or explicit representations. We conclude with some further directions.

Keywords: very large scale integrated circuits, computer aided design, formal verification, logic synthesis

Suggested Citation

Swamy, Gitanjali, Minimizing Interacting Finite State Machines (1993). Memorandum No. UCB/ERL M93/68, 9 September 1993, Available at SSRN: https://ssrn.com/abstract=3702098

Gitanjali Swamy (Contact Author)

PCRI, Harvard Business School ( email )

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IoTask ( email )

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University of California, Berkeley ( email )

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Auto-ID Center, MIT ( email )

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